1. Field of the Invention
The present invention relates to integrated circuit technology. More particularly, the present invention relates to submicron integrated circuit technology.
2. Description of Related Art
Impact ionization is the process in a material by which one energetic charge carrier can lose energy by the creation of other charge carriers. In semiconductors an electron, or hole, with enough kinetic energy can knock a bound electron from its bound state in the valence band and promote it to a state in the conduction band, creating an electron-hole pair. If this occurs in a region of high electrical field it may result in avalanche breakdown.
With extreme submicron integrated circuits it is very difficult to add additional transistors optimized for different power supply voltages. Current field programmable gate arrays (FPGAs) require 3.3 volt, 2.5 volt, 1.8 volt and 1.05 volt transistor devices, when only two optimized transistors are available. The prior-art solution to provide transistors optimized for different power supply voltages has been to overdrive the oxides and use lightly doped drains to achieve the desired breakdown voltages. This does not however address the energetic, or hot, electrons generated when the transistor switches and therefore passes through the breakdown voltage from impact ionization (BVii) region in the vicinity of the drain.
As described above, the basic problem is caused by hot carriers being accelerated by a high electric field in the oxide that causes the carriers to impact the SiO2 bonds of the oxide used to isolate the gate with enough energy to break the bonds of the oxide thereby damaging the oxide and allowing even more current to flow which can result in a runaway condition.
The hot carriers are caused by a high voltage on the drain of a transistor with the gate electrode grounded, the high voltage being close to the junction breakdown voltage. The grounded gate pinches off the electric field extending from the gate, causing electron leakage current at the surface of the device, i.e., the area between the drain and the transistor channel at the interface between the silicon and the gate oxide. The leakage current is commonly referred to as Bvii, and supplies a large number of hot electrons and hot holes. The hot holes are accelerated toward the most negative potential, i.e. the grounded gate. As the junction field between the n+ source/drain regions and the p-well containing them gets high enough, the leakage carriers gain enough energy to knock more electron hole pairs free causing leakage multiplication. These carriers have enough energy to get into the conduction band in the oxide and cause damage.
The gate structure exhibits an Si/SiO2 interface where the gate isolation oxide is adjacent the p-well channel area, and has an abrupt transition including dangling bonds and changing band structure. As a result there are a large number of traps at the interface. Electrical stressing can break bonds between Si and O of the oxide at the interface, leaving a dangling bond. The dangling bonds give rise to allowed states in the bandgap (traps) which can trap electrons and holes. Electrical stressing can also release hydrogen at the interface. Atomic hydrogen is generally used to passivate the interface traps. It is introduced after metallization through an anneal in forming gas and passivates the traps by forming Si—O—H type bonds. However, these bonds are very weak and can be easily broken by hot carriers. Hydrogen can also come from various other processing steps, e.g., plasma CVD and LPCVD of SiO2 and Si3N4.
Several models have been developed by different researchers to explain the oxide degradation and breakdown of the SiO2. If the electric field is sufficiently high, Fowler-Nordheim tunneling or hot carrier injection of electrons occurs into the conduction band of the oxide. The electrons gain energy from the electric field and lose it through lattice scattering. Some of these electrons lose all of the excess energy and get trapped in the oxide if traps are present in it. Many electrons continue to conduct in the conduction band of the oxide and in the process lose the excess energy through lattice scattering, which can cause damage to the bonds of the SiO2 lattice.
Electrical stressing can cause impact ionization at the Si/SiO2 interface, generating more hot electrons and hot holes. Hot holes can then be injected in the valance band of SiO2 via Fowler-Nordheim tunneling. Similar to the case of electrons, the holes also cause further damage through trap creation and trapping. Another model states that the high electric field itself may polarize the bonds and ultimately break them under a combination of electrical stress and thermal energy imparted to them.
All of these models agree that the damage is caused by bond breaking. Trapped charge causes changes in device properties as described earlier. However, if the damage is excessive, oxide breakdown occurs. Since the breakdown is accompanied with physical damage, it is not reversible.
This aspect of the device reliability has been tolerated with ever increasing transistor degradation, and is one of the major contributors to the lifetime reduction of integrated circuits in general and FPGAs specifically.